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| MITSUMI System Reset PST573 System Reset Monolithic IC PST573 Outline This IC functions in a variety of CPU systems and other logic systems, to detect power supply voltage and reset the system accurately when power is turned on or interrupted. This ultra-low current consumption high reset type system reset IC was developed using high resistance process and low current circuit design technology. Features 1. 2. 3. 4. 5. Ultra-low current consumption Low operating limit voltage Output current high for ON Hysteresis voltage provided in detection voltage 10 ranks of detection voltage ICCH=450A typ. ICCL=1A typ. 0.65V typ. -6mA typ. 50mV typ. PST573 C : 4.5V typ. D : 4.2V typ. E : 3.9V typ. F : 3.6V typ. G : 3.3V typ. H : 3.1V typ. I : 2.9V typ. J : 2.7V typ. K : 2.5V typ. L : 2.3V typ. Package MMP-3A (PST573 M) TO-92A (PST573 ) contains detection voltage rank . * Applications 1. 2. 3. 4. 5. Reset circuits in microcomputers, CPUs and MPUs. Logic circuit reset circuits. Battery voltage check circuits. Back-up power supply switching circuits. Level detection circuits. Pin Assignment 1 2 3 1 2 3 VCC GND VOUT 1 3 1 2 VCC GND VOUT 2 3 TO-92A MMP-3A MITSUMI System Reset PST573 Equivalent Circuit Diagram Absolute Maximum Ratings Item Storage temperature Operating temperature Power supply voltage Allowable loss (Ta=25C) Symbol TSTG TOPR VCC max. Pd Rating -40~+125 -20~+75 -0.3~10 200(MMP-3A) 300(TO-92A) Units C C V mW Electrical Characteristics Item Symbol (Ta=25C) (Except where noted otherwise, resistance unit is ) Measurement circuit Measurement conditions PST573C PST573D PST573E PST573F RL=4.7k < VCC-0.4V PST573G VOL = PST573H VCC=H L PST573I PST573J PST573K PST573L RL=4.7k VCC=L H L RL=4.7k Ta=-20C~+75C VCC=VS min. -0.05V RL=4.7k VCC=7.5V VCC=VS min. -0.05V RL= VCC=VS typ. /0.85V RL= RL=4.7k 1 CL=100pF RL=4.7k 1 CL=100pF RL=4.7k VOL > VCC-0.4V = VCC=VS min.-0.05V RL=0 Ta=-20C~+75C 2 RL=0 VCC -0.4 0.1 450 1.0 25 8 0.65 -2.0 -1.5 (VS typ.-0.4V) -6.0 700 1.8 60 20 0.85 Min. 4.3 4.0 3.7 3.4 3.1 2.9 2.75 2.55 2.35 2.15 25 Typ. 4.5 4.2 3.9 3.6 3.3 3.1 2.90 2.70 2.50 2.30 50 0.01 Max. 4.7 4.4 4.1 3.8 3.5 3.3 3.05 2.85 2.65 2.45 100 Units Detection voltage VS 1 V Hysteresis voltage Detection voltage temperature coefficient High level output voltage Output leakage current Circuit current while on Circuit current while off "H"transport delay time "L"transport delay time Operation limit voltage Output current while on I Output current while on II VS VS/ T VOH IOH ICCL ICCH tpLH tpHL VopL IOL I IOL II 1 1 1 1 1 1 2 2 1 1 1 mV %/C V A A A S S V mA mA * * * *1 : tpLH : VCC=(VS typ.-0.4V) *2 : VCC=VS min.-0.15V (VS typ.+0.4V), tpHL : VCC=(VS typ.+0.4V) MITSUMI System Reset PST573 Measuring Circuit [1] [2] INPUT PULSE 4.9V 4.1V 0V 0.8V VS 4.9 4.1 0V Note: Input model is an example for PST573C. Characteristics 8 7 6 5 3 2 1 0 1 (Example: PST573C) VCC vs. VOUT VCC vs. ICC 600 500 400 Ta=25C Ta=75C Ta=-20C VOUT (V) 4 Ta=-20C Ta=25C Ta=75C 2 3 4 5 6 7 8 ICC (A) 300 200 100 0 0 1 2 3 4 5 6 7 8 VCC (V) VCC (V) MITSUMI System Reset PST573 VS vs. Ta 4.53 4.52 4.51 VS vs. Ta 80 70 60 VS 4.50 (V) 4.49 4.48 4.47 -40 -20 0 20 40 60 80 VS 50 (mV) 40 30 20 -40 -20 0 20 40 60 80 Ta (C) Ta (C) IOL vs. Ta -9 -8 -7 VOH vs. Ta 4.25 4.20 4.15 IOL -6 (mA) -5 -4 -3 -40 -20 0 20 40 60 80 VOH (V) 4.10 4.05 4.00 4.95 -40 -20 0 20 40 60 80 Ta (C) Ta (C) ICCH vs. Ta 1.8 ICCL vs. Ta 700 600 1.6 500 ICCH (A) 1.4 1.2 1.0 0.8 0.6 -40 -20 0 20 40 60 80 lCCL 400 (A) 300 200 100 -40 -20 0 20 40 60 80 Ta (C) Ta (C) CL (RL) vs. tPLH VS (CPU)=0.7VCC 10.0 7 5 3 2 Pd vs. Ta 300 R L =1 0k 1.0 CL (F) 7 5 3 2 =1 RL 00 k R L 7 =4 0k 200 Pd (mW) 100 0.1 7 5 3 2 0 1 2 345 7 0 25 50 75 100 125 0.01 10 2 3 4 5 7 100 2 3 4 5 7 1000 Ta (C) TPLH (mS) MITSUMI System Reset PST573 Timing Chart 7 6 5 4 3 2 1 0 VCC VOUT VS (CPU) VS VCC/VOUT (V) Time RESET ON OFF Undefined Application circuits 1. Normal hard reset Delay time (tpLH) VCC-0.2 . = CL RL ln . Vscpu CL: F [ ]+0.025 (mS) Reset threshold voltage of CPU, MPU, etc. RL : k Vs cpu : Voltage: V Note: Connect a capacitor between IC pins 1 and 2 if VCC line impedance is high. 2. Manual reset added Note 1: Use RL, CL and Rm to prevent manual switch chattering. Note that Rm should be set to the following conditions. Rm < 1/20RL = Note 2: Connect a capacitor between IC pins 1 and 2 if VCC line impedance is high. 3. Battery checker (LED ON for high voltage) Note: Connect a capacitor between IC pins 1 and 2 if VCC line impedance is high. MITSUMI 4 Battery checker (LED ON for low voltage) System Reset PST573 Note: Connect a capacitor between IC pins 1 and 2 if VCC line impedance is high. 5. Hysteresis voltage UP method When increasing hysteresis voltage for stable system operation, determine RH as follows and connect externally. However, ICCH is -5000PPM/C, so perform temperature compensation at RH when using over a wide temperature range. Hysteresis voltage UP amount ( Vsup) is . Vsup = RH ICCL . Total hysteresis voltage ( Vstotal) is . Vstotal = Vs + Vsup . Note: Connect a capacitor between IC pins 1 and 2 if VCC line impedance is high. |
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